From 18dd092af7305d7a9b30962f620a46d028e803ab Mon Sep 17 00:00:00 2001 From: Laurent Modolo <laurent.modolo@ens-lyon.fr> Date: Wed, 28 Apr 2021 09:33:52 +0200 Subject: [PATCH] flexi_splitter: add main.nf and yaml example --- src/nf_modules/flexi_splitter/main.nf | 43 +++++++++++++++++++ .../flexi_splitter/marseq_flexi_splitter.yaml | 41 ++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 src/nf_modules/flexi_splitter/main.nf create mode 100644 src/nf_modules/flexi_splitter/marseq_flexi_splitter.yaml diff --git a/src/nf_modules/flexi_splitter/main.nf b/src/nf_modules/flexi_splitter/main.nf new file mode 100644 index 00000000..fdb5f29b --- /dev/null +++ b/src/nf_modules/flexi_splitter/main.nf @@ -0,0 +1,43 @@ +version = "1.0.2" +container_url = "lbmc/flexi_splitter:${version}" + +params.split = "" +params.split_out = "" + +process split { + // You can get an example of config file here: + // src/nf_modules/flexi_splitter/marseq_flexi_splitter.yaml + container = "${container_url}" + label "big_mem_multi_cpus" + tag "$file_prefix" + if (params.split_out != "") { + publishDir "results/${params.split_out}", mode: 'copy' + } + + input: + tuple val(file_id), path(reads) + tuple val(config_id), path(config) + + output: + tuple val(file_id), path("*.fastq*"), emit: fastq + + script: + if (file_id instanceof List){ + file_prefix = file_id[0] + } else { + file_prefix = file_id + } + def whitelist_param = "" + if (whitelist_id != "NO CONFIG"){ + whitelist_param = "-w ${white_list}" + } + + if (reads.size() == 2) + """ + flexi_splitter ${params.split} -f ${reads[0]} ${read[1]} -c ${config} -o split + """ + else + """ + flexi_splitter ${params.split} -f ${reads[0]} -c ${config} -o split + """ +} diff --git a/src/nf_modules/flexi_splitter/marseq_flexi_splitter.yaml b/src/nf_modules/flexi_splitter/marseq_flexi_splitter.yaml new file mode 100644 index 00000000..72f46d2d --- /dev/null +++ b/src/nf_modules/flexi_splitter/marseq_flexi_splitter.yaml @@ -0,0 +1,41 @@ +PLATE: + coords: + reads: 0 + start: 1 + stop: 4 + header: False + samples: + - name : Plate1 + seq: GACT + - name : Plate2 + seq: CATG + - name : Plate3 + seq: CCAA + - name : Plate4 + seq: CTGT + - name : Plate5 + seq: GTAG + - name : Plate6 + seq: TGAT + - name : Plate7 + seq: ATCA + - name : Plate8 + seq: TAGA + +conditions: + - Plate1 : + Plate1 + - Plate2 : + Plate2 + - Plate3 : + Plate3 + - Plate4 : + Plate4 + - Plate5 : + Plate5 + - Plate6 : + Plate6 + - Plate7 : + Plate7 + - Plate8 : + Plate8 -- GitLab